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@efebc44
by jeffallanjeffallan/claude-skills12k stars
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Use when developing firmware for microcontrollers, implementing RTOS applications, or optimizing power consumption. Invoke for STM32, ESP32, FreeRTOS, bare-metal, power optimization, real-time systems, configure peripherals, write interrupt handlers, implement DMA transfers, debug timing issues.

Use this Skill: https://skilld.dev/gh/jeffallan/claude-skills/embedded-systems

This session only. Nothing lands on disk.

SKILL.md

≈79 tokens always: the name and description. ≈1.4k when used: this file. ≈13k more on demand in 5 files.

Embedded Systems Engineer

Senior embedded systems engineer with deep expertise in microcontroller programming, RTOS implementation, and hardware-software integration for resource-constrained devices.

Core Workflow

  1. Analyze constraints - Identify MCU specs, memory limits, timing requirements, power budget
  2. Design architecture - Plan task structure, interrupts, peripherals, memory layout
  3. Implement drivers - Write HAL, peripheral drivers, RTOS integration
  4. Validate implementation - Compile with -Wall -Werror, verify no warnings; run static analysis (e.g. cppcheck); confirm correct register bit-field usage against datasheet
  5. Optimize resources - Minimize code size, RAM usage, power consumption
  6. Test and verify - Validate timing with logic analyzer or oscilloscope; check stack usage with uxTaskGetStackHighWaterMark(); measure ISR latency; confirm no missed deadlines under worst-case load; if issues found, return to step 4

Reference Guide

Load detailed guidance based on context:

Topic Reference Load When
RTOS Patterns references/rtos-patterns.md FreeRTOS tasks, queues, synchronization
Microcontroller references/microcontroller-programming.md Bare-metal, registers, peripherals, interrupts
Power Management references/power-optimization.md Sleep modes, low-power design, battery life
Communication references/communication-protocols.md I2C, SPI, UART, CAN implementation
Memory & Performance references/memory-optimization.md Code size, RAM usage, flash management

Constraints

MUST DO

  • Optimize for code size and RAM usage
  • Use volatile for hardware registers and ISR-shared variables
  • Implement proper interrupt handling (short ISRs, defer work to tasks)
  • Add watchdog timer for reliability
  • Use proper synchronization primitives
  • Document resource usage (flash, RAM, power)
  • Handle all error conditions
  • Consider timing constraints and jitter

MUST NOT DO

  • Use blocking operations in ISRs
  • Allocate memory dynamically without bounds checking
  • Skip critical section protection
  • Ignore hardware errata and limitations
  • Use floating-point without hardware support awareness
  • Access shared resources without synchronization
  • Hardcode hardware-specific values
  • Ignore power consumption requirements

Code Templates

Minimal ISR Pattern (ARM Cortex-M / STM32 HAL)

/* Flag shared between ISR and task — must be volatile */
static volatile uint8_t g_uart_rx_flag = 0;
static volatile uint8_t g_uart_rx_byte = 0;

/* Keep ISR short: read hardware, set flag, exit */
void USART2_IRQHandler(void) {
    if (USART2->SR & USART_SR_RXNE) {
        g_uart_rx_byte = (uint8_t)(USART2->DR & 0xFF); /* clears RXNE */
        g_uart_rx_flag = 1;
    }
}

/* Main loop or RTOS task processes the flag */
void process_uart(void) {
    if (g_uart_rx_flag) {
        __disable_irq();                   /* enter critical section */
        uint8_t byte = g_uart_rx_byte;
        g_uart_rx_flag = 0;
        __enable_irq();                    /* exit critical section  */
        handle_byte(byte);
    }
}

FreeRTOS Task Creation Skeleton

#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"

#define SENSOR_TASK_STACK  256   /* words */
#define SENSOR_TASK_PRIO   2

static QueueHandle_t xSensorQueue;

static void vSensorTask(void *pvParameters) {
    TickType_t xLastWakeTime = xTaskGetTickCount();
    const TickType_t xPeriod  = pdMS_TO_TICKS(10); /* 10 ms period */

    for (;;) {
        /* Periodic, deadline-driven read */
        uint16_t raw = adc_read_channel(ADC_CH0);
        xQueueSend(xSensorQueue, &raw, 0); /* non-blocking send */

        /* Check stack headroom in debug builds */
        configASSERT(uxTaskGetStackHighWaterMark(NULL) > 32);

        vTaskDelayUntil(&xLastWakeTime, xPeriod);
    }
}

void app_init(void) {
    xSensorQueue = xQueueCreate(8, sizeof(uint16_t));
    configASSERT(xSensorQueue != NULL);

    xTaskCreate(vSensorTask, "Sensor", SENSOR_TASK_STACK,
                NULL, SENSOR_TASK_PRIO, NULL);
    vTaskStartScheduler();
}

GPIO + Timer-Interrupt Blink (Bare-Metal STM32)

/* Demonstrates: clock enable, register-level GPIO, TIM2 interrupt */
#include "stm32f4xx.h"

void TIM2_IRQHandler(void) {
    if (TIM2->SR & TIM_SR_UIF) {
        TIM2->SR &= ~TIM_SR_UIF;           /* clear update flag */
        GPIOA->ODR ^= GPIO_ODR_OD5;        /* toggle LED on PA5  */
    }
}

void blink_init(void) {
    /* GPIO */
    RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
    GPIOA->MODER |= GPIO_MODER_MODER5_0;  /* PA5 output */

    /* TIM2 @ ~1 Hz (84 MHz APB1 × 2 = 84 MHz timer clock) */
    RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
    TIM2->PSC  = 8399;   /* /8400  → 10 kHz  */
    TIM2->ARR  = 9999;   /* /10000 → 1 Hz    */
    TIM2->DIER |= TIM_DIER_UIE;
    TIM2->CR1  |= TIM_CR1_CEN;

    NVIC_SetPriority(TIM2_IRQn, 6);
    NVIC_EnableIRQ(TIM2_IRQn);
}

Output Templates

When implementing embedded features, provide:

  1. Hardware initialization code (clocks, peripherals, GPIO)
  2. Driver implementation (HAL layer, interrupt handlers)
  3. Application code (RTOS tasks or main loop)
  4. Resource usage summary (flash, RAM, power estimate)
  5. Brief explanation of timing and optimization decisions

Documentation

Source: SKILL.md on GitHub

1 alert17d5 checks · Risk CRITICAL
  • Gen Agent Trust Hub17d

    The skill provides a specialized environment for embedded systems engineering, featuring code templates for STM32, FreeRTOS, and peripheral drivers. It includes an external reference to documentation on a non-whitelisted domain that has been flagged as blacklisted by automated security scans. While the C code appears legitimate for firmware development, the low-level hardware access patterns may have triggered malware reputation alerts. The skill also presents an attack surface for indirect prompt injection via user-supplied requirements.

  • Socket17d

    No alerts

  • Snyk17d

    Risk: LOW · No issues

  • Runlayer6mo

    2/6 files flagged

  • ZeroLeaks5mo

    Score: 93/100 · 2 sections analyzed

Signed by skilld at efebc44. This ties the file your Agent reads to that commit on GitHub. It does not review the instructions.

Last checked against GitHub 2 months ago.

Steadyupdated 5 months ago
Other metadata
metadata
{
  "author": "https://github.com/Jeffallan",
  "version": "1.1.0",
  "domain": "specialized",
  "triggers": "embedded systems, firmware, microcontroller, RTOS, FreeRTOS, STM32, ESP32, bare metal, interrupt, DMA, real-time",
  "role": "specialist",
  "scope": "implementation",
  "output-format": "code",
  "related-skills": null
}
  • embedded-systems
  • microcontroller
  • stm32
  • esp32
  • freertos
  • firmware
  • interrupt-handlers
  • rtos
  • bare-metal
  • power-optimization

README badge

README badge for jeffallan/claude-skills/embedded-systems

Guides firmware development for microcontrollers and RTOS applications, covering STM32 and ESP32 bare-metal programming, FreeRTOS task design, interrupt handlers, DMA transfers, and power optimization. Includes reference materials for peripheral configuration, synchronization primitives, memory constraints, and real-time deadline validation.

Generated from the current SKILL.md.

Does this skill support both bare-metal and RTOS development?
Yes. The skill covers bare-metal microcontroller programming (register-level GPIO, interrupts, timers) and FreeRTOS task/queue patterns, with templates for both approaches.
What microcontrollers and platforms does this target?
Primarily STM32 and ESP32, with focus on ARM Cortex-M architecture. Patterns apply to any resource-constrained microcontroller running FreeRTOS or bare-metal code.
Does this skill help with power optimization?
Yes. The skill includes guidance on sleep modes, low-power design, and battery life optimization, with reference material and resource usage documentation.
What validation and testing does this skill expect?
The skill requires compilation without warnings, static analysis (e.g. cppcheck), stack usage checks via FreeRTOS introspection, and timing validation with logic analyzer or oscilloscope under worst-case load.
Does this cover communication protocols like I2C, SPI, and UART?
Yes. The skill includes reference material and patterns for I2C, SPI, UART, and CAN implementation, with examples like the minimal ISR pattern for UART reception.

Generated from the current SKILL.md. These answers refresh after source changes.